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Re: GCSE store motion
- From: Daniel Berlin <dberlin at dberlin dot org>
- To: Robert Dewar <dewar at gnat dot com>
- Cc: mark at codesourcery dot com, <roger at eyesopen dot com>, <aj at suse dot de>,<davem at redhat dot com>, <gcc at gcc dot gnu dot org>, <rth at redhat dot com>
- Date: Wed, 15 May 2002 15:55:17 -0400 (EDT)
- Subject: Re: GCSE store motion
On Wed, 15 May 2002, Robert Dewar wrote:
> < If the optimization makes the compiler go slower when compiling itself,
> it ain't worth having.
> I think that's much too harsh. For example a thorough job of software loop
> pipelining using the rotating registers of the ia64 may require *quite*
> a bit of compilation time, and since this optimization is unlikely to help
> GCC itself much that seems unfortunate.
ia64 seems to be a special case.
I was toying with the ia64 version of intel's compiler yesterday, and i
was *amazed* at how many times it reruns optimizations and whatnot,
compared to their IA32 compiler.
It seems they threw everything they could to try to get it to move at a
> Perhaps a more appropriate rule is that this is the criterion for putting
> an optimization in -O1.