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Re: [new-regalloc-branch] (s390): Failure in reload_cse_simplify_operands



>            BTW, I am able to bootstrap the new-regalloc branch.  Allowing
>SImode in FPRs without instructions that can move between them always has
>been problematical for GCC.  PowerPC has a similar limitation and does not
>allow SImode in FPRs for exactly this type of reason.

We had problems with GCC, by not allowing SImode in FPRs and SFmode in
GPRs.
I don't remember excatly what went wrong, but I think it had something to
do
with unions (int, float). I will take a look at you PowerPC and see how you
solved that.

>            Also, I see about a 5% performance boost on benchmarks and
much
>less register spilling on some real-world testcases which produce
>horrendous code with the current register allocator.

We hope also to see that, looking at current register allocation isn't to
much fun..

>David


Mit freundlichem Gruß / Best regards,

Hartmut Penner



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