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Re: [new-regalloc-branch] (s390): Failure in reload_cse_simplify_operands
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: "Hartmut Penner" <HPENNER at de dot ibm dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 08 May 2002 16:05:21 -0400
- Subject: Re: [new-regalloc-branch] (s390): Failure in reload_cse_simplify_operands
- References: <OF3EB90592.00693A1A-ONC1256BB3.004FD5BC@de.ibm.com>
BTW, I am able to bootstrap the new-regalloc branch. Allowing
SImode in FPRs without instructions that can move between them always has
been problematical for GCC. PowerPC has a similar limitation and does not
allow SImode in FPRs for exactly this type of reason.
Also, I see about a 5% performance boost on benchmarks and much
less register spilling on some real-world testcases which produce
horrendous code with the current register allocator.