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Re: Post-register-allocation opportunitistic optimizer?

On Fri, May 03, 2002 at 03:49:58PM -0700, tm wrote:
> Imagine a situation in a basic block with two hard registers free.
> An analysis of the code reveals the following possible optimizations:
> optimization    scratch hard regs       RTX_COST
> opportunity         required            benefit
> -----------------------------------------------
>    #1                 1                   3
>    #2                 1                   5
>    #3                 2                  11
> In this case, if you perform optimization #1 first, then there is only
> one hard register free,

Stop.  You are already incorrect.

The register used in a peep2 will _only_ be used within that single
peephole pattern, thus it is dead after the matched sequence, thus
there are two free registers for _every_ matched sequence.

If you're thinking of this in combination with some post-reload CSE
pass, peep2 won't do.  In fact it sounds like nothing but a better
register allocator will do.


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