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Re: material for 3.1 release announcement


> On Fri, 3 May 2002, Jan Hubicka wrote:
> > Here is an attempt to do so.
> 
> Thanks!
> 
> > +       <li><p><a HREF="http://www.suse.de/~aj/SPEC";>SPEC2000</a> and <a
> > +       HREF="http://people.redhat.com/dnovillo/SPEC";>SPEC95</a> benchmark suites
> > +       are now used daily to monitor performance of the generated code
> "href" instead of "HREF", and I believe that both URLs lack a trailing
> "/".
Somehow I did changes you requested but missed this one.  It probably scrolled
out of screen, sorry.

While looking at it, I noticed that we document prefetching for i386, but don't
document -fprefetch-loop-arrays and new builtin.  Also I added bit
clarification to SSE support and notice about fp->int converison (we are about
10 times faster there as 3.0.x had bug doing partial memory stall in the
middle, this is important showstopper for 3D people)

Here is another bunch of changes, let me know what of them seems
resonable.

Another idea is that we probably can mention the fact that code size has
dropped considerably (at both -O2 and -Os), but I don't have 3.0 here to get
some numbers. I guess this can be appealing to people building distros.

Honza

Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-3.1/changes.html,v
retrieving revision 1.28
diff -c -3 -p -r1.28 changes.html
*** changes.html	3 May 2002 13:39:33 -0000	1.28
--- changes.html	3 May 2002 23:00:43 -0000
***************
*** 38,45 ****
        runs.  In the absence of profile info the compiler attempts to guess the
        profile statically.</p>
  </li>
! <li><p><a HREF="http://www.suse.de/~aj/SPEC";>SPEC2000</a> and <a
!       HREF="http://people.redhat.com/dnovillo/SPEC";>SPEC95</a> benchmark suites
        are now used daily to monitor performance of the generated code.
  
        <p>According to the SPECInt2000 results on an AMD Athlon CPU, the code
--- 38,45 ----
        runs.  In the absence of profile info the compiler attempts to guess the
        profile statically.</p>
  </li>
! <li><p><a href="http://www.suse.de/~aj/SPEC/";>SPEC2000</a> and <a
!       href="http://people.redhat.com/dnovillo/SPEC/";>SPEC95</a> benchmark suites
        are now used daily to monitor performance of the generated code.
  
        <p>According to the SPECInt2000 results on an AMD Athlon CPU, the code
***************
*** 48,53 ****
--- 48,61 ----
        about 2.1% faster compared to 2.95.3.  Tests were done using the
        <code>-O2 -march=athlon</code> command-line options.</p>
  </li>
+ 
+ <li<p>Support for data prefetching instructions has been added to the GCC
+       backend and several targets.  New <code>__builtin_prefetch</code>
+       instrics is available to explicitly insert prefetch instructions and
+       experimental support for loop array prefetching has been added (see
+       <code>-fprefetch-loop-array</code> documentation).
+ 
+ </li>
  </ul>
  
    
*************** documentation</a>.</p>
*** 189,195 ****
        
        <li>The compiler now supports MMX, 3DNow!, SSE, and SSE2 instructions.
        Options <code>-mmmx</code>, <code>-m3dnow</code>, <code>-msse</code>,
!       and <code>-msse2</code> will enable the respective instruction sets.</li>
  
        <li>Following those improvements, targets for Pentium MMX, K6-2, K6-3,
        Pentium III, Pentium 4, and Athlon 4 Mobile/XP/MP were added.
--- 197,205 ----
        
        <li>The compiler now supports MMX, 3DNow!, SSE, and SSE2 instructions.
        Options <code>-mmmx</code>, <code>-m3dnow</code>, <code>-msse</code>,
!       and <code>-msse2</code> will enable the respective instruction sets.
!       Intel C++ compatible MMX/3DNow!/SSE intrics are implemented.  SSE2
!       intrics will be added in next major release.</li>
  
        <li>Following those improvements, targets for Pentium MMX, K6-2, K6-3,
        Pentium III, Pentium 4, and Athlon 4 Mobile/XP/MP were added.
*************** documentation</a>.</p>
*** 199,208 ****
        <li>For those targets that support it, <code>-mfpmath=sse</code> will
        cause the compiler to generate SSE/SSE2 instructions for floating point
        math instead of x87 instructions.  Usually, this will lead to quicker
!       code &mdash; especially on the Pentium 4.</li>
  
        <li>Prefetch support has been added to the Pentium III, Pentium 4, and
        Athlon series.</li>
     </ul></li>
  
  <li>The PowerPC back-end has added 64-bit PowerPC GNU/Linux support.</li>
--- 209,222 ----
        <li>For those targets that support it, <code>-mfpmath=sse</code> will
        cause the compiler to generate SSE/SSE2 instructions for floating point
        math instead of x87 instructions.  Usually, this will lead to quicker
!       code &mdash; especially on the Pentium 4. Note that only sclar floating
!       point instructions are used and GCC does not exploit SIMD features yet.</li>
  
        <li>Prefetch support has been added to the Pentium III, Pentium 4, and
        Athlon series.</li>
+ 
+       <li>Code generated for floating point to integer converisons has been
+       improved leading to better performance of many 3D applications.</li>
     </ul></li>
  
  <li>The PowerPC back-end has added 64-bit PowerPC GNU/Linux support.</li>


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