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Re: DFA for PPro, P2, P3
> In message <20020502223945.B5496@redhat.com>, Richard Henderson writes:
> > On Thu, May 02, 2002 at 08:28:48PM -0600, email@example.com wrote:
> > > That's one of the things that is (to me at least) extremely unclear about
> > > the PPro/P2/P3 pipeline -- ordering/dependency of uops.
> > Well it's quite clear that a load-execute x86 insn (as your example
> > must have been)
> Actually my example was a shift of a register by a constant. Those
> are incorrectly marked as using p0 and p01 in the current pipeline
> description. If it was a load-execute it would have used p2 in some
> way. I didn't figure it was worth confusing folks with this tidbit
> of information :-)
You missunderstood the current description. It marks both p0 and p01
to avoid overloading of p01 unit when p0 instruction is already
The shift is realy just p0 instruction.