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Re: ldq and stq on UltraSparc I and II
- From: "David S. Miller" <davem at redhat dot com>
- To: obrien at FreeBSD dot org
- Cc: gcc at gcc dot gnu dot org, rth at redhat dot com
- Date: Tue, 30 Apr 2002 14:35:07 -0700 (PDT)
- Subject: Re: ldq and stq on UltraSparc I and II
- References: <20020430141112.A78266@dragon.nuxi.com>
From: "David O'Brien" <obrien@FreeBSD.org>
Date: Tue, 30 Apr 2002 14:11:12 -0700
I found that GCC 3.1 uses ldq and stq to load long doubles w/HARD_QUAD.
The problem is UltraSparc I and II CPU's do not have the instructions in
silicon. FreeBSD has now emulated them, but of course there is a
performance hit. Should the sparc description be changed to not use
these CPU's? Or should -mcpu's possible values be expanded for greater
granularity on modern [UltraSparc] processors?
When you say HARD_QUAD this means "supports all quad instructions"
You need to emulate these instructions anyways. There is no benefit
from adding the extra granularity you are asking for.
Ultra-III does not implement any of the quad float stuff either
FWIW. That is where I do most of my testing btw :)
If you don't want to take the performance hit, do the proper
quad float library implementation :-)