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Re: PR 6394
- From: "John David Anglin" <dave at hiauly1 dot hia dot nrc dot ca>
- To: dje at watson dot ibm dot com (David Edelsohn)
- Cc: mark at codesourcery dot com, law at redhat dot com, dave dot anglin at nrc dot ca, gcc at gcc dot gnu dot org
- Date: Tue, 30 Apr 2002 13:46:19 -0400 (EDT)
- Subject: Re: PR 6394
> Alan Modra and the IBM ppc64 Linux team found similar bad register
> allocation for 64-bit PowerPC. As an interim solution, we added splitters
> that handle FP registers for those patterns to rs6000.md. I would suggest
> implementing something similar for PA-RISC GCC 3.1 or GCC 3.1.1.
Jeff, should we go ahead with a temporary fix for the ICE in the machine
definition or is there a chance for a better fix? I am thinking of the
patch that I previously sent, modified to handle the situation in both
32bit and 64bit code. This would be just for the branch.
Dave
--
J. David Anglin dave.anglin@nrc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6605)