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About VLIW processor target
- From: "=?gb2312?B?vaogzrC7qg==?=" <whjiang_cn at hotmail dot com>
- To: gcc at gcc dot gnu dot org
- Date: Mon, 29 Apr 2002 14:32:54 +0800
- Subject: About VLIW processor target
- Bcc:
We plan to make a target for philips trimedia to gcc. But trimedia is a
typical VLIW processor, we don't want to do the instruction schedule
ourselves. Philips has provided a instruction scheduler. But its input is
more like the GCC RTL than assemble output. We don't know how to start the
work about register allocation (scheduler's input use very little registers
and all the operand is used as a reference to one instruction which
generates the result).
Can any one give some advice? Which is the VLIW target in all the
current GCC targets? Have any one ever faced such situation and how did you
solve it?
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