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Re: Conditional call instruction
- From: Segher Boessenkool <segher at chello dot nl>
- To: Dale Johannesen <dalej at apple dot com>
- Cc: Geoff Keating <geoffk at geoffk dot org>, gcc at gcc dot gnu dot org
- Date: Thu, 14 Feb 2002 00:48:38 +0100
- Subject: Re: Conditional call instruction
- References: <6896C989-20D5-11D6-B07E-003065C86F94@apple.com>
- Reply-to: segher at chello dot nl
> For the PC-relative branch, that's true, but you can also conditionally
> call to the contents of LR or CTR. It may be that it's better code
> not to load those registers when the condition is false, though.
If the branch is predicted taken, it's probably best to _do_ load the
register, so prefetch can work. I say "probably", because I'm not sure
whether any actual chips do prefetch conditional indirect jumps. Surely
the branch target will have to be loaded into lr/ctr far enough in advance
(the same is true for unconditional indirect jumps).