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Re: Pentium 4 Optimization Complimenting icc 5.0
- From: Florian Weimer <fw at deneb dot enyo dot de>
- To: Joe Buck <jbuck at synopsys dot COM>
- Cc: rth at redhat dot com (Richard Henderson), swalton at dsrnet dot com (Walton Shane), gcc at gnu dot org
- Date: Thu, 07 Feb 2002 22:51:03 +0100
- Subject: Re: Pentium 4 Optimization Complimenting icc 5.0
- References: <200202070117.RAA10019@atrus.synopsys.com>
Joe Buck <jbuck@synopsys.COM> writes:
>> Not just "tuned for p3" -- the P4 is about 20% slower across the
>> board when similar clock speeds are compared. The P4 architecture
>> team inside Intel has taken quite a lot of heat for this.
> ... unless you can get all the pipelines set up just right with DSP-like
> code with completely predictable control flow, in which case the P4 flies.
... and even beats the Itanium in many cases. Alas, the limited
address range makes the Pentium 4 unsuitable for real work.