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Re: (something of an absence of) SSE2 documentation
- From: Jan Hubicka <jh at suse dot cz>
- To: Tom Womack <tom at womack dot net>
- Cc: gcc at gcc dot gnu dot org, rth at cygnus dot com
- Date: Tue, 5 Feb 2002 16:13:53 +0100
- Subject: Re: (something of an absence of) SSE2 documentation
- References: <email@example.com>
> In what section of which manual ought the asm() constraints for SSE
> registers to be documented? They somehow fall between the cracks;
> I was expecting to find the documentation in a "machine-specific"
> section under "extended assembly" in info gcc. It wouldn't make
> sense to document them in info as, they're very much gcc constructs.
It is documented in the Constraints section of manual, as any other
constraints are. You seems to be using old version of manual, please
use one distributed with snapshots.
> I ended up guessing that the information might be in gcc/config/i386.h,
> which told me the letters
> x SSE registers
> y MMX registers
> Y 'SSE2' registers
You may use 'x' for SSE registers. 'Y' is used just internally.
> but I don't see what the distinction between SSE and SSE2 _registers_ is
> supposed to be; the SSE and SSE2 operations all act on the same
> set of eight registers.
The difference is that when SSE2 is not available 'Y' is ignored, so we
can easilly write mixed paterns for x87 and SSE2 instructions that will
pick the variants.
It is internal to gcc only.
For writing SSE code in sources, the Intel style builtins are the way to go.
They map 1-1 to ones documented in Intel manual, but you need to include
special header in order to get the types defined and Intel-like names
instead of __buildin_xxx
> Looking through i386.md, "Y" constraints are associated with DF and
> V2DF-mode instructions, and there seems to be really very little handling at
> all of the SSE2 extended-MMX instructions, which use operands of type V16QI,
> V8HI, V4SI and V2DI.
The SSE2 intriscs are not supported yet, as long as I remember. You do have
support for SSE/MMX/3dNOW intrics contributed by Bernd and for SSE/SSE2 fp
arithmetcs contributed by me. SSE2 intriscs are probably being worked on.
I expected them to happen before 3.1 freeze, but it don't appears to be the
case, sadly :(