Re: condition codes, haifa-sched and virtual-stack-vars

[Ulrich Weigand <weigand at immd1 dot informatik dot uni-erlangen dot de>]

Greg McGary wrote:

>Here's a summary of mutations, by optimizer phase.

[snip reload generating addsi insn clobbering CC]

>Things would have been OK if the stack var weren't the first one,
>so that it got an offset in 00.rtl, and the associated clobber.
>Maybe we shouldn't emit bare virtual-stack-vars, but rather emit as
>plus with 0 offset?

I've been fighting exactly this problem on s390 ever since
we changed from cc0 to an explicit CC register :-(

The problem is that reload simply calls gen_add2_insn whenever it
feels like it, without consideration that this might introduce
a CC clobber at an inappropriate point ...

The only way I've found around this is to use some insn that
performs an addition without clobbering CC; on many architectures
some sort of 'load-address' instruction can be used for this.
E.g. on i386, every addition reload wants to perform appears to
fit the 'lea' pattern, so they don't have the problem.

On s390, while we do have a load-address pattern, it is somewhat
restricted (e.g. it accepts only immediate offsets in the 0..4095
range).  I've tried to trick reload into using LA anyway, by 
providing a generic 'add' pattern and splitters to massage the
result into a form acceptable by LA afterward.

There might be other options, e.g. converting addsi3 into an
expander that generates different code when called while
reload_in_progress, or using a secondary input reload to 
handle PLUS reloads ...

If you don't have any sort of load-address instruction, I don't
know what to do either.

Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  weigand@informatik.uni-erlangen.de