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Re: ldreqd instruction in xscale
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Alan Lehotsky <apl at alum dot mit dot edu>
- Cc: Arvind Krishnaswamy <arvind at CS dot Arizona dot EDU>, gcc at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Fri, 25 Jan 2002 11:03:23 +0000
- Subject: Re: ldreqd instruction in xscale
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> ldr<cond>d and str<cond>d are specific to Intel's ARM processor (think that documentation is available at Intel.com on this
> (and probably also at the ARM web site...).
Wrong. They are defined by ARM architecture version 5 (which the XScale
implements).
>
> ldrd/strd use an even/odd register pair and an 8-byte aligned memory address to transfer 8 bytes of data.
> It's faster than ldm/stm....
But only works for an address that is 8-byte aligned. Which isn't much
use for most C programs given that no type requires 8-byte alignment :-(
R.