Re: Best options for 64-bit FP on athlon?

[Tim Prince <tprince at computer dot org>]

Tim Prince wrote:

> 
> 
> Brad Lucier wrote:
> 
>> I have a lot of FP code where the algorithms depend on setting the 
>> precision
>> to 64-bits (i.e., no extended precision) for correctness.  Since I've
>> heard great things on the mail lists about MMX/SSE/SSE2/... doing
>> 64-bit FP faster, I want to try it.
>>
>> But reading the 3.1 docs, I cannot figure out what options to give to
>> get what I want.  Now, maybe I missed something, but I don't think
>> it's there. 
> 
> 
> 
>>
>> Brad
>>
>>
> 
> Maybe not, but gcc docs don't typically go into hardware to the extent 
> which appears to be needed here.  We don't know of any Athlon supporting 
> SSE2, which is the only one of those architecture variants which 
> supports 64-bit FP.
> gcc doesn't currently support the parallel paired double instructions 
> with auto-vectorization, which is the way the most impressive 
> performance would be obtained with SSE2.  The options to generate scalar 
> SSE2 are -msse2 -march=pentiumpro.
> The option -msse doesn't generally work for P-III, but it may work for 
> Athlon.  It uses both mmx and sse (32-bit floating point) without taking 
> into account that they use the same register territory on a P-III.


In the first sentence of your post, you wrote as if you wanted to set 
the x87  53-bit rounding mode, as commercial Windows, and, apparently, 
FreeBSD run-time libraries do.  AFAIK, you must either write the asm() 
or consult the facilities of your library.  A few commercial compilers 
for linux have an option -pc64, which sets 64-bit storage for spills, 
but may not go so far as to set the corresponding precision.



-- 
Tim Prince
tprince@computer.org