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Re: ambiguous insn in altivec
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Aldy Hernandez <aldyh at redhat dot com>
- Cc: dan at dberlin dot org, gcc at gcc dot gnu dot org
- Date: Tue, 08 Jan 2002 14:07:00 -0500
- Subject: Re: ambiguous insn in altivec
>>>>> Aldy Hernandez writes:
Aldy> is there a reason for the second insn? you added this.
Aldy> (define_insn "altivec_vspltisw"
Aldy> [(set (match_operand:V4SI 0 "register_operand" "=v")
Aldy> (unspec:V4SI [(match_operand:QI 1 "immediate_operand" "i")] 141))]
Aldy> "TARGET_ALTIVEC"
Aldy> "vspltisw %0, %1"
Aldy> [(set_attr "type" "vecsimple")])
Aldy> (define_insn ""
Aldy> [(set (match_operand:V4SF 0 "register_operand" "=v")
Aldy> (unspec:V4SF [(match_operand:QI 1 "immediate_operand" "i")] 142))]
Aldy> "TARGET_ALTIVEC"
Aldy> "vspltisw %0, %1"
Aldy> [(set_attr "type" "vecsimple")])
One is SImode and one is SFmode.
David