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Re: m68k problem and libstdc++
- From: Dale Johannesen <dalej at apple dot com>
- To: Craig Rodrigues <rodrigc at mediaone dot net>
- Cc: Dale Johannesen <dalej at apple dot com>, libstdc++ at gcc dot gnu dot org, gcc at gcc dot gnu dot org, schwab at suse dot de
- Date: Thu, 3 Jan 2002 17:18:29 -0800
- Subject: Re: m68k problem and libstdc++
On Thursday, January 3, 2002, at 04:55 PM, Craig Rodrigues wrote:
> An assembler error is resulting:
> Error: invalid instruction for this architecture; needs 68020 or
> higher -- statement `cas.l %d0,%d1,(%a0)' ignored
> I suspect it is because of the code in
> static inline _Atomic_word
> __attribute__ ((__unused__))
> __exchange_and_add (volatile _Atomic_word *__mem, int __val)
> register _Atomic_word __result = *__mem;
> register _Atomic_word __temp;
> __asm__ __volatile__ ("1: move%.l %0,%1;"
> " add%.l %2,%1;"
> " cas%.l %0,%1,%3;"
> " jbne 1b"
> : "=d" (__result), "=&d" (__temp)
> : "d" (__val), "m" (*__mem), "0" (__result)
> : "memory");
> return __result;
> I'm not a 68000 asm expert. Does anyone have an idea as
> to what the fix could be?
CAS is an indivisible instruction intended to allow synchronization
of multiple processors (the sequence above is straight out of one of
Motorola's examples). I don't think there's any way to get that
functionality on pre-68020 chips, so you'll have to conditionalize
it away somehow. If supporting such chips is no longer required,
and I would guess it's not, the easiest fix will be to pass a flag
to the assembler telling it the target is 68020 or higher.
(I know the architecture fairly well, at least I used to, but I'm
not expert on multiprocessor synchronization.)