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Re: front end changes for altivec
On Tue, Nov 27, 2001 at 09:24:03AM -0600, Aldy Hernandez wrote:
> do we really need to specify a vector size?
Yes. This documents the intention of the author of the code.
With such, one could write generic code to handle the case that
the machine does not support SIMD at all, or that the machine
supports SIMD but in a narrower mode written in the source.
It also lets the author write code with larger vector sizes (8, 16, 32...)
and have the compiler automatically decompose into whatever the
machine can actually handle. Which might possibly give the
compiler more information and let it optimize better. Dunno
for sure about that, but it's not implausable.
> vector(4) int foo;
> vector<4> int foo;
int foo __attribute__((vector(4)));
which, iirc, also works as a prefix,
__attribute__((vector(4))) int foo;
which, with appropriate cpp magic in <altivec.h> becomes
#define __vector __attribute__((__vector__(4)))
__vector int foo;
which merely leaves you the c++ nastiness problem with
"vector" vs "__vector" vs "std::vector".