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Re: front end changes for altivec

> > > SSE is 128 bits.
> > 
> > sorry, mmx then.
> > 
> > which complicates things further... with this mmx and sse and sse2, what
> > would the default be for "vector int"?  mmx is 64bits (right?) and sse
> > is 128bits, so when we talk of vector int, what are we talking about.
> I think all these problems show clearly that the extension is poorly thought
> out and should not be included in gcc.

that's why i brought up here first, so we can talk it through and
hopefully come up with a good design that can be used across all the
different simd architectures.

re the different sizes in x86 simd (mmx/sse/sse2), we could have the
default vector sizes depend on the macro i proposed.  the macro could
return different vector sizes based on TARGET_MMX/etc flags.  very

and if the user specifies:

	vector<2> int foo;

it can only mean V2SI in mmx if TARGET_MMX (and available) or V2SI in
sse* if TARGET_SSE* (and available).

i don't think it's that bad.

Aldy Hernandez			E-mail:
Professional Gypsy
Red Hat, Inc.

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