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Re: MODES_TIEABLE_P question
On Fri, Nov 09, 2001 at 06:09:38PM -0800, Stephen Clarke wrote:
> But I'm still not totally happy, because I need to hold DImode values
> in even/odd pairs of fp registers, so then
> HARD_REGNO_MODE_OK (fr0, SImode) is 1
> HARD_REGNO_MODE_OK (fr0, DImode) is 1
> HARD_REGNO_MODE_OK (fr1, SImode) is 1
> HARD_REGNO_MODE_OK (fr1, DImode) is 0
> which would appear to cause a problem if SImode and DImode are
I don't recall. Look at the sparc port, which does this too.