Re: powerpc & unaligned block moves with fp registers

[David Edelsohn <dje at watson dot ibm dot com>]

>>>>> DJ Delorie writes:

>> What is your definition of "unaligned"?  Anything other than
>> natural alignment?

DJ> The intent is "anything that causes a trap".

DJ> No amount of cost adjustment will absolutely prevent an unaligned
DJ> reference trap on chips that do that, if such a move is the only
DJ> option.  GCC chooses a movdi because the ppc backend tells it that
DJ> such a move would work, when in fact it will not in the case I'm
DJ> interested in.

	If a nearly aligned reference will not work, why isn't this a case
for strict-align instead of a performance issue?  If you are saying that
the user absolutely cannot suffer an alignment exception, that seems like
the intention of strict-align.  Otherwise it *is* an issue of degrees.

DJ> The only other way I could think of handling this is trying to detect
DJ> sufficiently unaligned DI moves, and make using an FP register for
DJ> them prohibitively expensive, but under enough register pressure gcc
DJ> may still use them.

	As I mentioned before, why not disallow the DImode move instead of
trying to get GCC to select the right register preference for DImode.  If
you don't use the 64-bit FPRs, it really IS NOT a DImode move on a 32-bit
system.

David