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Re: Urgent: bug fixes needed for GCC 3.0.2


  In message <46740000.1002085424@warlock.codesourcery.com>you write:
  > I've been made aware of three bugs that we should try very hard to
  > fix for GCC 3.0.2:
  > 
  > PR4186:
  > 
  >   Jim Wilson analyzed this bug and figured out it was a sibling call
  >   optimization bug.  Has anyone worked on a patch?  Jeff, since you
  >   wrote a lot of the sibcall code, would you care to take a look?
I'm not sure this is a sibcall problem.  It may be a problem in the register
allocator....


>From the .regmove dump we have:

(insn 6 56 7 (set (reg/v/u/f:SI 43)
        (mem/f:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 4 [0x4])) 34)) 35 {*movsi_1} (nil)
    (nil))

(insn 16 9 28 (set (reg/f:SI 45)
        (mem/s/u:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 8 [0x8])) 34)) 35 {*movsi_1} (nil)
    (nil))

(insn 31 29 33 (set (mem/f:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 8 [0x8])) 0)
        (const_int 11 [0xb])) 35 {*movsi_1} (nil)
    (nil))

(insn 33 31 35 (set (mem/f:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 4 [0x4])) 0)
        (reg/f:SI 45)) 35 {*movsi_1} (insn_list 16 (nil))
    (expr_list:REG_DEAD (reg/f:SI 45)
        (nil)))

(insn 35 33 36 (set (mem/f:SI (reg/f:SI 16 argp) 0)
        (reg/v/u/f:SI 43)) 35 {*movsi_1} (insn_list 6 (nil))
    (expr_list:REG_DEAD (reg/v/u/f:SI 43)
        (nil)))

(call_insn/j 36 35 37 (set (reg:SI 0 eax)
        (call (mem:QI (symbol_ref:SI ("memcpy")) 0)
            (const_int 12 [0xc]))) 415 {*call_value_0} (nil)
    (expr_list:REG_UNUSED (reg:SI 0 eax)
        (nil))
    (nil))

[ As usual, notes and other irrelevant stuff has been removed. ]

insns 6 & 16 read the incoming arguments while insns 31, 33 and 35 write
the outgoing arguments.  The reads happen before the writes and all is well.

If we look at the .lreg dump we have:

(insn 6 56 7 (set (reg/v/u/f:SI 43)
        (mem/f:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 4 [0x4])) 34)) 35 {*movsi_1} (nil)
    (expr_list:REG_EQUIV (mem/f:SI (reg/f:SI 16 argp) 0)
        (nil)))

(insn 31 29 58 (set (mem/f:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 8 [0x8])) 0)
        (const_int 11 [0xb])) 35 {*movsi_1} (nil)
    (nil))

(insn 58 31 33 (set (reg/f:SI 45)
        (mem/s/u:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 8 [0x8])) 34)) 35 {*movsi_1} (nil)
    (expr_list:REG_EQUIV (mem/s/u:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 8 [0x8])) 34)
        (nil)))

(insn 33 58 35 (set (mem/f:SI (plus:SI (reg/f:SI 16 argp)
                (const_int 4 [0x4])) 0)
        (reg/f:SI 45)) 35 {*movsi_1} (insn_list 16 (nil))
    (expr_list:REG_DEAD (reg/f:SI 45)
        (nil)))

(insn 35 33 36 (set (mem/f:SI (reg/f:SI 16 argp) 0)
        (reg/v/u/f:SI 43)) 35 {*movsi_1} (insn_list 6 (nil))
    (expr_list:REG_DEAD (reg/v/u/f:SI 43)
        (nil)))

(call_insn/j 36 35 37 (set (reg:SI 0 eax)
        (call (mem:QI (symbol_ref:SI ("memcpy")) 0)
            (const_int 12 [0xc]))) 415 {*call_value_0} (nil)
    (expr_list:REG_UNUSED (reg:SI 0 eax)
        (nil))
    (nil))

Note that we effectively reemited insn 16 as insn 58 between insns 31 and
33.  This is what results in the write of the outgoing args before we have
completed reading the incoming args.  

I'm pretty sure this is happening in update_equiv_regs because we have
RTX_UNCHANGING_P set for the MEM which appears in insn 16.

Presumably we set the bit because the argument is marked as "const".

So the question becomes should we have set the unchanging bit in the
first place (probably yes)?

Assuming yes, then should the sibcall code have turned the bit off
(probably yes)?

Assuming yes, then how difficult it is to have the sibcall turn off
that bit?  I have no idea.

Thoughts/comments?

jeff


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