Re: mul + div with 64 bit signed ints on IA32

["Tim Prince" <tprince at computer dot org>]

----- Original Message -----
From: "Frank Klemm" <pfk@fuchs.offl.uni-jena.de>
To: "Jan Hubicka" <jh@suse.cz>
Cc: <gcc@gcc.gnu.org>
Sent: Tuesday, September 04, 2001 12:51 PM
Subject: mul + div with 64 bit signed ints on IA32


>
> A rounding of a 'double' to an 'int' with ANSI-C took 160
clocks on a K6-2.
> In the same time it was possible to calculate the scalar of
_two_ 1200 byte
> long vectors of float values. This is brain dead!

I don't see that you have specified which gcc version you have
chosen.  The 3.0 series chooses by far the slowest method.  I
don't attempt to run gcc on my K6-2 anyway.  Honza has done an
excellent job of correcting this in gcc-3.1, without taking any
unusual shortcuts, implementing both x87 and SSE2.  I hope you
don't advocate undoing his work in favor of something totally
strange.
>
> Here we have problems with the design of C and with the design
of the FPU
> of the iA32 architecture.
No doubt an unusually slow code generation choice could be made
for almost any architecture.  It's true that the idea of a single
instruction to store float to integer with truncation toward zero
came late in the IA32 series, but the gcc-3.0 code sequence is
contrary to any recommendation ever published.  Compaq just
corrected a similar problem in their compilers, before the Intel
acquisition.
>
>
> Option proposals:
>
> -fsaverc
> -ffastrc
> -fsavecld ; the same for the cld flag
> -ffastcld
>
glibc includes implementations of lrint() and the like.  I'd like
to see something like -ffast-rint to support g77 (Fortran
spelling -ffast-nint), which has a precedent in the MipsPro
compilers.  That only modifies the code to accept IEEE style
round-to-nearest in place of Fortran style round-to-nearest.