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Re: Mips16 question...

> From: Shane Nay <>
> To: mike stump <>,,
> Date: Wed, 29 Aug 2001 14:26:35 -0700

> Yea, I pulled that down, now I'm getting some strangeness from
> binutils.  It's complaining about perfectly valid instructions...,
> Ugh.  (2.11.2 & CVS)

:-( Dated searching with cvs isn't an uncommon way to track down

> > Shouldn't be too hard to put a ! TARGET_MIPS16 on the
> > instructions...

> Explain ..., how does this work?

That is kinda like saying, explain, how does the compiler work.  The
tendancy is to say nicely, as the other explanation is about 500-1000
pages.  Below I will attempt a 5 second tour.  In
gcc/config/mips/, we find:

(define_insn "subsi3_internal"
  [(set (match_operand:SI 0 "register_operand" "=d")
  (minus:SI (match_operand:SI 1 "reg_or_0_operand" "dJ")
	      (match_operand:SI 2 "arith_operand" "dI")))]
   && (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) != -32768)"
  [(set_attr "type"	"arith")
   (set_attr "mode"	"SI")])

The above says that this instruction is not valid for MIPS16.  This is
the most trivial case.  In mips.c, we find:

	  else if (GP_REG_P (regno0))
	      /* Don't use X format, because that will give out of
		 range numbers for 64 bit host and 32 bit target.  */
	      if (! TARGET_MIPS16)
		ret = "li\t%0,%1\t\t\t# %X1";
		  if (INTVAL (op1) >= 0 && INTVAL (op1) <= 0xffff)
		    ret = "li\t%0,%1";
		  else if (INTVAL (op1) < 0 && INTVAL (op1) >= -0xffff)
		    ret = "li\t%0,%n1\n\tneg\t%0";

This means that the first insn isn't valid on the MIPS16, and the
second two are to be used instead.

> As far as MIPS16 documentation, the best I know is the VR4181
> documentation includes a pretty good instruction by instruction
> mips16<->mips32 overview.

Thanks, I added this to the readings page so I can find it next time I
need it.

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