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Re: [RFC] patch: Re: reg+reg addressing mode on SPARC


On Fri, Aug 10, 2001 at 06:46:44PM -0700, Dan Nicolaescu wrote:
> Meanwhile let's see if my patch is correct...
> (it bootstraps on sparc-sun-solaris2.8)

> +       if (code0 == REG || code1 == REG)
> +         return 2;

It apparently does not do what was described it does: it gives higher cost
for %reg+anything.
And the example you gave is IMHO really not related to addressing mode
costs, after all they are the same. The thing is we need to find out why
loop optimization does not do its job properly.
If it e.g. wrote the first loop as:
 .LL5:
         ld      [%o4+%o2], %o1
         add     %o2, 4, %o2
         cmp     %o2, 4095
         ble     .LL5
         add     %o3, %o1, %o3
         retl
         mov     %o3, %o0
it would be better. Even better with:
 .LL5:
         ld      [%o4+%o2], %o1
         cmp     %o2, 4095-4
         ble     .LL5
         add     %o2, 4, %o2
         retl
         add     %o3, %o1, %o0
But in all these cases reg+reg addressing is used. Pesimizing reg+reg or
even reg+anything will make generated code worse.

	Jakub


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