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Memory insn patterns for wide operations
- To: <gcc at gcc dot gnu dot org>
- Subject: Memory insn patterns for wide operations
- From: Alan Shieh <ashieh at OCF dot Berkeley dot EDU>
- Date: Wed, 8 Aug 2001 17:01:49 -0700 (PDT)
In my target, I have only 6 8-bit general registers available, and so I
must specify memory-memory insn patterns for modes HI and larger for
reload to succeed. Is there a standard mechanism for factoring out this
code to improve maintainability?