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Re: gcc300 benchmarks slower than gcc295.3?


n Thu, 19 Jul 2001, Richard Henderson wrote:

[...]

>It did make a measurable difference at one point -- it's entirely
>possible that this wants disabling for Athlon and P4.

Is the difference measurable on small benchmarks that fit in the L1
icache, like dhrystone? Or is it measurable on real applications that have
to load?

	Was this a question for me? :) The performance difference *is* measurable 
(on a PIII) in an integer dhrystones test. Perhaps interestingly, setting 
-mcpu=athlon and -march=athlon for this same PIII ameliorates this spec and 
my own real-world spec, but not the flops.c (V2.0; referenced in one of 
Paolo's postings), and not to gcc 2.95.3 performance levels. And, yes, the 
performance difference is also measurable in a large application. Not 
dramatic (17hz vs. 18hz in an animation kludge), but measurable. I guess I 
could help this discussion by comparing the 2 on a RISC machine (an R5000 
O2), but that will have to wait a while.

[...]

Although I don't actually know how common this is at all. It was pointed
to as the reason for the slowdown on the FP benchmark, but if it doesn't
affect register allocation I suspect that something else was the _real_
issue. The FP slowdown seemed to be due to extra memory accesses.


RenE J.V. Bertin
College de France/LPPA
11, place Marcelin Berthelot
75005 Paris, France


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