Re: Register renaming on x86

[Toshi Morita <tm2 at best dot com>]

> I don't know much about how schedulers work, so this maybe obvious to you or stupid, if so, sorry.
> 
> Taking account of renaming:
> The main purpose of the register renaming is to help along out of order execution, so an operation executed out of order can continue even though the register it's writing to is in use.  So, from the compilers point of view it fixes W.A.W. hazards, this means on P6 & athlon the following execute at the same speed:
> 
> (intel syntax)
> mov eax, ebx
> mov eax, 5
> 
> mov eax, ebx
> mov ecx, 5
> 
> Of course the compiler is unlikely to produce such stupid code, but it might produce code like this were the two moves are separated by a conditional jump.

This is not a very good example.

Something like this:

	movl	(%esi),%eax
	movl	%eax,(%edi)
	movl	4(%esi),%eax
	movl	%eax,4(%edi)

...makes more sense, because this type of code is actually emitted by the compiler
and can execute out-of-order with register renaming.

The original example doesn't convey that register renaming is similar to an SSA
pass implemented in hardware.

Toshi