Register renaming on x86

["Robert Thorpe" <ela97jrt at shef dot ac dot uk>]

I don't know much about how schedulers work, so this maybe obvious to you or stupid, if so, sorry.

 

Taking account of renaming:

The main purpose of the register renaming is to help along out of order execution, so an operation executed out of order can continue even though the register it's writing to is in use.  So, from the compilers point of view it fixes W.A.W. hazards, this means on P6 & athlon the following execute at the same speed:

 

(intel syntax)

mov eax, ebx

mov eax, 5

 

mov eax, ebx

mov ecx, 5

 

Of course the compiler is unlikely to produce such stupid code, but it might produce code like this were the two moves are separated by a conditional jump.

 

Secondly when an operation is three operand there is no performance hit in using a source operand for a destination one:

 

lea ecx,[ebp + 4*ecx] is fine

as is

lea eax,[4*eax+eax]