This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: Number of registers on x86
- To: dewar at gnat dot com, tm2 at best dot com
- Subject: Re: Number of registers on x86
- From: dewar at gnat dot com
- Date: Tue, 30 Jan 2001 08:41:43 -0500 (EST)
- Cc: gcc at gcc dot gnu dot org
Hmmm! Perhaps Geert Bosch can settle this because he knows these specs
very well, but my impression was most certainly that register renaming
is implemented on the Pentium, and that this is where the figure of
40 comes from (I have known that figure from long before when the P4
was announced).
Also, out of order execution and register renaming are really rather
different issues, I am not sure why you are tying them together like
that.
Toshi said
---------
The IA32 likewise also encompasses a class of processors rather than a
single implementation, so I believe this is an inaccurate statement.
The 8086, 80186, 80286, 80386, 80486, and Pentium all are in-order execution
processors, so therefore they do not use register renaming at all.
The Pentium Pro and its derivatives (P2 and P3) and also the P4 have
out-of-order execution capability and use hardware register renaming.