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Re: gcc for i960 - Jim Wilson? are you out there?
- To: jc at quadron dot com
- Subject: Re: gcc for i960 - Jim Wilson? are you out there?
- From: Jim Wilson <wilson at cygnus dot com>
- Date: Thu, 5 Oct 2000 14:47:50 -0700
- Cc: gcc at gcc dot gnu dot org
- Newsgroups: cygnus.egcs
In article <39DCE294.1AD53AC0@quadron.com> you write:
>I have built the gcc cross-compiler for Linux/i960. My target is the
>960HD processor.
The i960 port has not been actively maintained for a long time.
Support for the V1.1 architecture was never added to gcc, and most processors
based on the V1.1 architecture, such as HX, are not directly supported by
gcc. You can still generate code for them by picking the closest processor
that is supported. Maybe one of the J* chips? My recollection of which
processors are related to which is a little hazy nowadays. GNU as does
support the V1.1 architecture, so you can always write assembler code by
hand if necessary.
I don't have access to any linux/i960 system. I only have access to a few
embedded i960 systems that are difficult to use. I am so busy with IA-64
work that I don't have time for much if any i960 work.
>My question is to what extent the "architecture variations" are
>supported. I have looked at the i960.h file, at the TARGET_SWITCHES
>(for i960 cpu variants, Sx, Kx, Jx, Cx...). However, I don't see where
>any of these flags are used int the gcc code. Hx is absent, but it
>looks like maybe none of them are hooked up.
The TARGET_SWITCHES entries cause various TARGET_FLAG_FOO flag bits to be
set. These are then tested by various TARGET_FOO macros. See for instance
the TARGET_K_SERIES macro that evaluates to true if the TARGET_FLAG_K_SERIES
bit is set.
Jim