Re: best optimization under IRIX ?

[Matthias Kurz <mk at baerlap dot north dot de>]

On Wed, Sep 06, 2000 at 08:30:30PM -0700, Tim Prince wrote:
> 
> ----- Original Message -----
> From: "Matthias Kurz" <mk@baerlap.north.de>
> 
> > The cc code runs twice as fast on a R12000, again (did not try gcc,
> > i guess it will be also twice as fast). But then, the R12000/300 has 8MB
> > cache, while the R10000/180 has only 1MB.
> 
> I saw some cases where gcc ran somewhat better relative to MipsPro cc on the
> r12k than on the r10k, just enough so to support the claim that r12k had
> corrected some bottlenecks.  8MB cache?  Your problem will have to sit a
> long time on a single processor to take advantage of that.

My (real world) test was running on "one" processor of a 4 processor box
that was more than 99% idle. Ok, not quite real world.
What do you mean with "gcc ran somewhat better relative to cc on the r12k" ?
That the speed diff from gcc to cc was smaller on the r12k than on the
r10k ?
I tried the gcc code on the R12000, to see whether the bigger cache helps.
But, while the cc code ran 50% faster on the R12000, the gcc one only got
a speedup of 35%. That's _one_ program and _one_ data set. One will have
to run many different programs with different data to get a picture. I
was only here to ask for "best" configure/compile options. Maybe in the
same time i could have tried the most permutations :)

>                                                             The r12k box I
> had access to had 4MB L2 cache, and my processes were interrupted far too
> often to take advantage of that.  Funny thing, my laptop does as well on
> Livermore Kernels as that r12k did.  What a difference a year or two can
> make.

Well, from the numbers it would need a 808MHz PIII with 256k cache to
catch the R12000. I'm using a 550MHz one, currently. But one would have
to compare fully utilized boxes with the same number of processors.
That's another story.


   (mk)

-- 
Matthias Kurz; Fuldastr. 3; D-28199 Bremen; VOICE +49 421 53 600 47