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Re: PDP-10 backend for gcc


At 8:04 AM +0200 8/29/00, lars brinkhoff wrote:
>Alan Lehotsky <lehotsky@tiac.net> writes:
>>  At 8:05 AM +0200 8/25/00, lars brinkhoff wrote:
>>  > > On Thu, Aug 24, 2000 at 07:50:09AM +0200, lars brinkhoff wrote:
>>  > > > I may be writing a PDP-10 backend for gcc during the next year.  It's
>>  > > > a word-adressed 36-bit machine with a 30-bit virtual address space.
>>  > Does it seem like it would be possible to write a back end using these
>>  > pointer formats?
>>
>>  I've worked on a compiler that supported TWO different sized pointers
>>  (24 and 32 bits) and there are a lot of problems. [I also worked on
>>  a compiler for the DEC-10 (Bliss36), so I know a lot about your
>>  target machine. [If you need someone to bounce ideas off, feel free
>>  to mail me....]
>
>Thanks!
>
>>  The biggest problem you will encounter is the fact that the way that
>>  RTL is currently generated, you don't really get the opportunity to
>>  provide any type information about a pointer.  There's basically
>>  a Pmode that's supposed to be correct for ALL pointers.
>
>So, a hack to make gcc support two pointer formats (global one-word
>byte pointers and ordinary global pointers) could be a quick-and-
>dirty solution?


	Well, it wouldn't be THAT dirty, other than requiring you to
	be careful about using PSI mode for all pointers and making
	sure that all pointer arithmetic used IBP instructions not
	regular ADDs/SUBs.

	It just would run somewhat slower and prevent you from using
	the full glory of the PDP-10 addressing modes. :-)


>  > Certainly, if you wanted to sacrifice performance, you could make
>>  ALL pointers be byte-pointer format (with 36 bit fields) and
>>  pretty much everything would work.
>
>The problem with this is that one-word global byte pointers can't
>point to 36-bit bytes.  (Or so I'm told.)


	It's been a long time since I've looked at the telephone
	book for the KL-10 :-).  But, as I recall the 30 bits weren't
	normally directly addressable.  The 36 bit word of a byte pointer
	had something like

		- an indirect bit
		- a 6 bit bit position
		- a 6 bit field size
		- 4 or 5 bits for index register?
		  (gee, I wrote code for this machine for 5
		   years and I can't remember now....)
		- 18 bits of offset.

>  > Alternatively, you may need to propose an extension to the RTL and
>>  the code generator generator so that you can maintain the necessary
>>  type information.
>>
>>  IMHO, such an extension would be a major contribution to the GCC
>>  community, because these problems keep cropping up in DSP ports
>>  and the current solutions are less than satisfactory.
>
>I'm quite willing to try this, but I'm not sure that my employer want
>to pay for it.

	It would be a lot of work, but depending on how good a
	compiler you need, it might be worth it.

	-- Al Lehotsky
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