Re: Reload pass clobbers cc0

[Kenn Humborg <kenn at linux dot ie>]

On Wed, Aug 16, 2000 at 04:57:10PM -0400, Alan Lehotsky wrote:
> Basically, you have to be able to make the Scc patterns handle ALL
> memory addresses if they can handle ANY memory.  You can tell the
> patterns to do the right thing if you have appropriate use of '0' in
> your constraints along with '>' and '<'.  But on a machine with a lot
> of addressing modes like the VAX, it's going to get ugly really quick

Thanks.  That's sorted it out.  And actually it's not too 
bad.  The original sgeu looked like this:

   (define_insn "sgeu"
     [(set (match_operand:SI 0 "general_operand" "=ro")
           (geu (cc0) (const_int 0)))]
     ""
     "movl $1,%0\;sbwc $0,%0")

The modified one look like:

   (define_insn "sgeu"
     [(set (match_operand:SI 0 "general_operand" "=ro,<>")
           (geu (cc0) (const_int 0)))]
     ""
     "@
      movl $1,%0\;sbwc $0,%0
      bgequ 1f\;clrl %0\;brb 2f\;1f: movl $1, %0\;2f:")

I think this should catch everything.

Now, it would be nice if these insns could be flagged as
'never reload' or 'trigger internal compiler error if
reloaded'.

I'm just left wondering how far back this problem goes, and
if anyone's ever spotted it.  The current offical vax.md
doesn't define a udivsi3 insn or expand, but GCC still 
generates incorrect code when optimizing

   extern unsigned int f(unsigned int);
   unsigned int g(unsigned int x)
   {
      return f(x/0x80000001);
   }

Admittedly, this operation is probably quite rare, as the divisor
needs to be constant and > 0x80000000, and the expression needs
to be in an argument list.

Later,
Kenn