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Re: SSE Support for ia32?
- To: Mike Stump <mrs at windriver dot com>
- Subject: Re: SSE Support for ia32?
- From: Richard Henderson <rth at cygnus dot com>
- Date: Thu, 6 Jul 2000 17:36:21 -0700
- Cc: aj at suse dot de, gcc at gcc dot gnu dot org
- References: <200007060159.SAA11891@kankakee.wrs.com>
On Wed, Jul 05, 2000 at 06:59:30PM -0700, Mike Stump wrote:
> Yes for SSE for some versions of gcc. I haven't heard of SSE2, so I
> cannot comment on it.
It's in Intel's next generation ia32 chips, currently code-named
Willamete (sp). The primary extensions are 2 vector doubles
(instead of 4 vector floats), as well as more integer manipulation.
AFAIK, there are no current plans for implementing SSE2; but it
doesn't sound very hard at all, once Red Hat's current SSE code
is integrated.
r~