Re: Re: arm.md: arm_arch4 & LDRH vs LDRB

["Olga Karakozova" <jorky at mail dot ru>]

>On Tue, May 16, 2000 at 07:03:19PM -0700, Igor Shevlyakov wrote:
>> Hi folks,
>>
>> I'm trying to understand is there a problem with code generation under
ARM or
>> not and would appreciate your comments.
>>
>> Could you tell me why LDRH is using for possibly unaligned half-word data
>> acesses while ARM "Architecture Reference Manual" states that "If the
address
>> is not hald-word aligned result is UNPREDICTABLE".
>>
>> I tried to run simple test case on StrongArm-110 and some ARM7 CPUs and
got
>> two different behaviors but both are incorrect.
>>
>> Maybe 2 LDRB instructions should be used when address is not known to be
>> aligned.
>
>Given the arm defines:
>
>	/* Non-zero if move instructions will actually fail to work
>	   when given unaligned data.  */
>	#define STRICT_ALIGNMENT 1
>
>That means the compiler will align things so that any pointer created by
the
>compiler (without unions, casts, etc.) is properly aligned.  This is fairly
>standard for many machines.  When the compiler knows the that things are
>unalgined (such as with the aligned(1) attribute), it will generate slower
code
>(such as doing two byte loads and a shift/or).  In all other cases, the
>compiler assumes the pointer is appropriate aligned.  As you noticed,
different
>implementations of hardware do different things.

I tried to compile following example:

typedef unsigned short __attribute__ ((aligned(1))) *tpShort;
tpShort qx;

unsigned short i;

void module1(void)
{
  i = *qx;
}

-----------------------------------------------------------------
And got following .s file


@ Generated by gcc 2.96 20000516 (experimental) for ARM/elf
	.file	"t.c"
.gcc2_compiled.:
.text
	.align	2
	.global	module1
	.type	 module1,function
module1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, current_function_anonymous_args = 0
	mov	ip, sp
	stmfd	sp!, {fp, ip, lr, pc}
	sub	fp, ip, #4
	ldr	r2, .L3
	ldr	r3, .L3+4
	ldr	r3, [r3, #0]
	ldrh	r3, [r3, #0]	@ movhi
	strh	r3, [r2, #0]	@ movhi
	ldmea	fp, {fp, sp, pc}
.L4:
	.align	2
.L3:
	.word	i
	.word	qx
.Lfe1:
	.size	 module1,.Lfe1-module1
	.comm	qx, 4	@ 4
	.comm	i, 4	@ 2
------------------------------------------------------

As we could see, attribute aligned(1) doesn't help in that case, we still
got LDRH & STRH. I'm afraid there is a problem if I placed attribute
specification in correct place.


Thanks
Igor Shevlyakov