This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: RFC: Prefetch instruction support
- To: lucier at math dot purdue dot edu, dje at watson dot ibm dot com
- Subject: Re: RFC: Prefetch instruction support
- From: Brad Lucier <lucier at math dot purdue dot edu>
- Date: Tue, 11 Apr 2000 16:45:23 -0500 (EST)
- Cc: gcc at gcc dot gnu dot org, hubicka at atrey dot karlin dot mff dot cuni dot cz
I'm thinking of the Data Stream Touch (dst), Data Stream Touch Transient
(dstt), and Data Stream Touch for Store (dstst) instructions in Chapter
5 of the Programming Environments Manual at
http://www.altivec.org/tech_specifications/show_techpdf.cfm
The differences wrt dcbt and dcbtst are discussed in section 5.2.1.7.
Brad
> From dje@watson.ibm.com Tue Apr 11 16:30:13 2000
> >>>>> Brad Lucier writes:
>
> Brad> Altivec on PowerPC G4 also has prefetch instructions that may be useful
> Brad> for regular code, even if you don't generate vector Altivec instructions.
>
> I am not sure what you mean by an Altivec-specific instruction.
> The PowerPC Architecture has data cache block touch (dcbt) and data cache
> block touch for store (dcbtst) instructions which take an indexed form
> address and may pre-load the cache line.
>
> David
>