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IA64



   I just saw a talk by Stephen Skedzielewski (manager of the IA64
compiler performance analysis team at Intel) giving an overview of
compilation techniques for the IA64 architecture.
   Is gcc ready/able for dealing with these kinds of issues?  (sounds like
the people at intel still aren't sure about how to look for the optimal
combination of all the different code optimizations their hardware
enables).

Just curious (because it sounds like a hard problem, and like the arch is
a vast improvement over the IA32 arch).

Lynn



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