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Re: (define_address ...) suggestions needed
- To: Denis Chertykov <denisc at overta dot ru>
- Subject: Re: (define_address ...) suggestions needed
- From: Bernd Schmidt <bernds at balti dot cygnus dot co dot uk>
- Date: Tue, 11 Jan 2000 20:53:38 +0000 (GMT)
- cc: gcc at gcc dot gnu dot org
On Tue, 11 Jan 2000, Denis Chertykov wrote:
> I have started work on implement (define_address ...) patterns in md
> file.
I'm really happy to see someone work on this. I have a couple of ideas,
but never thought it through well enough to actually start working on it.
> RTL example:
>
> (define_attr "address_cost" "" (const_int 0))
> (define_attr "address_mode_dependent" "no,yes" (const_string "no"))
> (define_attr "address_direction" "load,store,load_store"
> (const_string "load_store"))
>
>
> (define_address "*immediate"
> [(mem (match_operand:HI 0 "immediate_operand" "i"))]
> ""
> "* /* Only C code can be used here
> because it's analog of PRINT_OPERAND_ADDRESS */
> output_addr_const (asm_out_file, operands[0]);
> return \"\";"
> [(set_attr "address_cost" "4")])
>
> (define_address "post_inc"
> [(mem (post_inc:HI (match_operand:HI 0 "register_operand" "e")))]
> ""
> "*{
> switch (REGNO (operands[0]))
> {
> case REG_X: return \"X+\";
> case REG_Y: return \"Y+\";
> case REG_Z: return \"Z+\";
> default:
> fatal (\"Incorrect register as address\");
> }
> }"
> [(set_attr "address_cost" "2")
> (set_attr "address_mode_dependent" "yes")])
> ------------------------------------------------------
> I'm use `mem' only for checking mode and because `genrecog' generates
> ready code for a address recognizing.
>
> Any predicate which uses `memory_operand' can't be used in
> (define_address ...) to avoid infinite loop.
Some machines support nested MEMs, so this has to be supported in some way.
What might be useful is to specify a constraint letter for every addressing
mode. GCC currently has a few hardcoded ones ('<', '>', 'm', 'o', ...); it
would be nice if every pattern could specify exactly what kind of addresses
it can accept in an operand. This might solve a problem we have on the Thumb
where different insns accept different base register classes when loading
from memory.
Bernd