Re: 64-bit PowerPC SCC instruction generation

[Geoff Keating <geoffk at cygnus dot com>]

> cc: Michael Meissner <meissner@cygnus.com>, gcc@gcc.gnu.org
> Date: Wed, 05 Jan 2000 14:55:31 -0500
> From: David Edelsohn <dje@watson.ibm.com>
> 
> 	I have been looking into how to generate 64-bit SCC instructions
> in the 64-bit PowerPC port.  The problem stems from the lack of
> mode-specific sXX pattern names.  At first I thought that I would need to
> do something complicated along the lines of mips.c:gen_int_relational(),
> but further invetigation looks like I can do something simpler in the sXX
> patterns.  Does the following style of pattern look correct?
> 
> (define_expand "seq"
>   [(set (match_dup 2) (match_dup 1))
>    (set (match_operand:SI 0 "gpc_reg_operand" "")
>         (eq:SI (match_dup 2) (const_int 0)))]
>   ""
>   "
> { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
>   operands[1] = gen_rtx_COMPARE (mode,
>                                  rs6000_compare_op0, rs6000_compare_op1);
>   operands[2] = gen_reg_rtx (mode);
> 
>   if (TARGET_POWERPC64
>       && (GET_MODE (rs6000_compare_op0) == DImode
>           || GET_MODE (rs6000_compare_op1) == DImode))
>     {
>       emit_insn (gen_rtx_SET (VOIDmode, operands[2], operands[1]));
>       convert_move (operands[0],
>                     gen_rtx_EQ (DImode, operands[2], const0_rtx), 0);
>       DONE;
>     }
> }")
> 
> The change is adding the TARGET_POWERPC64 conditional block.

I would put a mode in the gen_rtx_SET ('mode' looks like the right
one) rather than VOIDmode.

The convert_move probably is necessary, if you still want operand[0]
to have SImode.  I suspect you really want operand[0] to have DImode,
in which case the match_operand needs to be changed, and you can do:

(define_expand "seq"
  [(set (match_dup 2) (match_dup 1))
   (set (match_operand 0 "gpc_reg_operand" "")
        (eq:SI (match_dup 2) (const_int 0)))]
  ""
  "
{ enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode;
  operands[1] = gen_rtx_COMPARE (mode,
                                 rs6000_compare_op0, rs6000_compare_op1);
  operands[2] = gen_reg_rtx (mode);

  if (TARGET_POWERPC64
      && (GET_MODE (rs6000_compare_op0) == DImode
          || GET_MODE (rs6000_compare_op1) == DImode))
    {
      emit_insn (gen_rtx_SET (mode, operands[2], operands[1]));
      emit_insn (gen_rtx_SET (DImode, operands[0],
		      gen_rtx_EQ (DImode, operands[2], const0_rtx)));
      DONE;
    }
}")

Perhaps if this is done then the predicate should double-check that
the mode of its operand is the register-size mode?

-- 
- Geoffrey Keating <geoffk@cygnus.com>