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Re: Why performance so poor on Alpha?
- To: martin dot kahlert at mchp dot siemens dot de
- Subject: Re: Why performance so poor on Alpha?
- From: Joern Rennecke <amylaar at cygnus dot co dot uk>
- Date: Fri, 29 Oct 1999 17:52:13 +0100 (BST)
- Cc: toon at moene dot indiv dot nluug dot nl, egcs at egcs dot cygnus dot com
> So, perhaps some sort of modification of gas would help?
> I mean to rewrite the asm gcc outputs using more registers.
> On a load store architecture like the Alpha with a clean asm
> lifetime analysis of registers should be fairly easy and this could be
> done here more easily. Perhaps this is some sort of peep hole opt?
I don't think either of these is the right place.
I'd rather suggest to make sched1 generate USEs for psuodos a little
bit later than they actaully die, and/or CLOBBERS a little bit earlier
than they are set, so that the scheduler can pass its knowledge of the
conflicts on to the register allocator.