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Re: Stack regs constraints change proposal


On Wed, Oct 27, 1999 at 03:58:10PM +0200, Jan Hubicka wrote:
> To my surprise I found, that the constraints for reg-stack is more weird
> that I expected. So I propose to change it in a incompatible way.

I don't think this is a good idea.  The asm troubles we had with
the reload rewrite depended on un- or poorly documented behaviour.
In comparison, the reg-stack rules are relatively straightforward
and documented.

>    1. Given a set of input regs that die in an asm_operands, it is
>       necessary to know which are implicitly popped by the asm, and
>       which must be explicitly popped by gcc.
> 
> 	An input reg that is implicitly popped by the asm must be
> 	explicitly clobbered, unless it is constrained to match an
> 	output operand.
> 
> This is little bit weird. The way it works is that you identify the input
> register using "one class" constraint and the "matching" register in 
> clobbers. For example if you want to pop first and second operand you write:
> asm(::"t"(1.0),"u"(2.0),"st","st(1)")
> I really don't know why reload accepts something like:
> 
> (insn 12 11 15 (parallel[
>             (asm_operands/v ("") ("") 0[
>                     (reg:DF 24)
>                     (reg:DF 25)
>                 ]
>                 [
>                     (asm_input:DF ("t"))
>                     (asm_input:DF ("u"))
>                 ]  ("/home3/hubicka/t.c") 4)
>             (clobber (reg:QI 18 fpsr))
>             (clobber (reg:QI 17 flags))
>             (clobber (reg:QI 9 st(1)))
>             (clobber (reg:QI 8 st(0)))
>         ] ) -1 (nil)
>     (nil))

I'm surprised reload accepts this.  However, the source level rule
is quite plain -- it should simply be transformed into RTL differently:

	(parallel[
             (asm_operands/v ("") ("") 0[
                     (reg:DF 24)
                     (reg:DF 25)
                 ]
                 [
                     (asm_input:DF ("t"))
                     (asm_input:DF ("u"))
                 ]  ("/home3/hubicka/t.c") 4)
             (clobber (reg:QI 18 fpsr))
             (clobber (reg:QI 17 flags))
             (clobber (reg:DF 24))
             (clobber (reg:DF 25))
         ] )

where the third and fourth clobbers should be interpreted as match_dup
with the inputs.

> This (and following) rules requires user to use explicit (one reg)
> fp register classes to ensure proper ordering of operands.
> Since only first two registers have explicit clases (t and u),
> this efectivly restrict number of operands to two. This is anoying.

Yeah, well.  There are backward compatible ways this could be
addressed, but do you really want to be putting _that_ much 
stuff in an inline asm?  I would reserve asm for the operations
that you can't get from the compiler naturally -- like f2xm1.

>    6. Some asm statements may need extra stack space for internal
>       calculations.  This can be guaranteed by clobbering stack registers
>       unrelated to the inputs and outputs.

This could be converted in the initial processing into a scratch.
Anything else runs the risk of reload trying to spill some specific
register for no reason.


r~


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