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Reload problem


I'm currently looking at
http://egcs.cygnus.com/ml/gcc-bugs/1999-08/msg00216.html.  I can reproduce
it with 2.95.2, but not with 2.96.  But IMHO the bug is still present in
2.96.

We are doing reloads for this insn:

(insn 41 273 47 (parallel[ 
            (set (reg:SI 0 %d0)
                (div:SI (reg:SI 0 %d0)
                    (const_int 19 [0x13])))
            (set (mem/s:SI (plus:SI (reg:SI 5 %d5)
                        (reg:SI 1 %d1)) 0)
                (mod:SI (reg:SI 0 %d0)
                    (const_int 19 [0x13])))
        ] ) 212 {divmodsi4} (insn_list 31 (insn_list 36 (nil)))
    (expr_list:REG_UNUSED (reg:SI 0 %d0)
        (expr_list:REG_DEAD (reg:SI 0 %d0)
            (nil))))

The following reloads are needed:

Reload 0: reload_in (SI) = (reg:SI 5 %d5)
	ADDR_REGS, RELOAD_FOR_OUTPUT_ADDRESS (opnum = 3)
	reload_in_reg: (reg:SI 5 %d5)
Reload 1: reload_in (SI) = (const_int 19 [0x13])
	DATA_REGS, RELOAD_FOR_INPUT (opnum = 2)
	reload_in_reg: (const_int 19 [0x13])
Reload 2: reload_out (SI) = (mem/s:SI (plus:SI (reg:SI 5 %d5)
                                                        (reg:SI 1 %d1)) 0)
	DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 3)
	reload_out_reg: (mem/s:SI (plus:SI (reg:SI 5 %d5)
                                                        (reg:SI 1 %d1)) 0)

combine_reloads combines reload 2 with reload 1.  After choosing the
reload registers they look like this:

Reload 0: reload_in (SI) = (reg:SI 5 %d5)
	ADDR_REGS, RELOAD_FOR_OUTPUT_ADDRESS (opnum = 3)
	reload_in_reg: (reg:SI 5 %d5)
	reload_reg_rtx: (reg:SI 8 %a0)
Reload 1: reload_in (SI) = (const_int 19 [0x13])
	reload_out (SI) = (mem/s:SI (plus:SI (reg:SI 5 %d5)
                                                        (reg:SI 1 %d1)) 0)
	DATA_REGS, RELOAD_OTHER (opnum = 2)
	reload_in_reg: (const_int 19 [0x13])
	reload_out_reg: (mem/s:SI (plus:SI (reg:SI 5 %d5)
                                                        (reg:SI 1 %d1)) 0)
	reload_reg_rtx: (reg:SI 3 %d3)
Reload 2: DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 3)
	reload_out_reg: (mem/s:SI (plus:SI (reg:SI 5 %d5)
                                                        (reg:SI 1 %d1)) 0)

and we get these reload insns (note that they are backwards):

(insn 276 41 270 (set (mem/s:SI (plus:SI (reg:SI 5 %d5)
                (reg:SI 1 %d1)) 0)
        (reg:SI 3 %d3)) -1 (nil)
    (nil))

(insn 270 276 47 (set (reg:SI 8 %a0)
        (reg:SI 5 %d5)) -1 (nil)
    (nil))

The problem is that the reload insns are emitted in order of operand
numbers.  I'm not sure where the bug is, but I think that combine_reloads
should not have combined the two reloads.

Andreas.

-- 
Andreas Schwab                                  "And now for something
schwab@suse.de                                   completely different."
SuSE GmbH, Schanzäckerstr. 10, D-90443 Nürnberg


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