Re: 2.95, x86: severe performance problems with short arithmetic

[Zack Weinberg <zack@bitmover.com>]

Jeffrey A Law wrote:
>   In message <199908111723.KAA04075@zack.bitmover.com>you write:
>   > If I make a patch to do this, will it be accepted for 2.95.1?
> No.  gcc-2.95.1 is for critical bugfixes.  This is not qualify.

Right... then we should focus on improving the new backend for 2.96.
An approach occurred to me in the shower:

At RTL generation time, pretend that there are no HImode operations
other than load/store.  For example, we'd produce

(set (reg:SI 21) (extend:SI (mem:HI address)))
(set (reg:SI 22) (add (reg:SI 21) (const_int 1)))
(set (mem:HI address) (subreg:HI (reg:SI 22) 0))

for an increment of a HImode memory location.  We do similar things to
QImode, except I don't think it's necessary to eliminate all of the
patterns there.  After reload, we decide how to generate the
load-and-extends based on processor type (xor/movw versus movzwl,
etc.)

This exposes the situation in RTL, which should mean we need less work
on the optimizer proper.

zw