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Re: Has anyone built gcc-2.95 as a cross for TI c3x/c4x targets?
Charles Krug writes:
> Has anyone built gcc-2.95 as a cross-compiler to TI c3x/c4x targets?
> Michael Hayes website seemed to say that 2.95 was going to include
> 'c3x/c4x targets. Has this been done yet? Has anyone built it?
Yes and yes. It is now included with gcc-2.95 and should build
without any problems (you may not be able to build some of the
libraries if you don't have C header files previously installed).
However, the code produced by gcc-2.95 for the C30/C40 DSPs
results in poor benchmark times for the following reasons.
1. It does not emit the fast block repeat instructions.
2. It does not software pipeline loops to utilise parallel instructions.
3. Auto-increment addressing modes are not well utilised.
4. Induction variable combination is poor.
5. Delay slot filling is sub-optimal.
To address the first two points, I submitted patches to egcs-patches
many months ago that seem to have been piped to /dev/null :-)
To address the third point I have written a pass that generates
def-use chains that are then scanned for instructions to be combined
to utilise auto-increment (and auto-modify) addressing modes. This
seems to work well but I do not have the time at present to thoroughly
test it.
Hopefully Joern will sort out the fourth problem with his work on
strength reduction :-) (I still get better strength reduction of
induction variables on the C4x with gcc-2.7)
Improvements to delay slot filling require large hacks to reorg. This
has never worked well with multiple delay slots as the folks working
on the SHARC port are also finding.
Michael.