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In a message dated 2/21/99 11:59:07 PM Pacific Standard Time, law@upchuck.cygnus.com writes: << A negate instruction on the PA1.x machines is implemented by an fsub instruction -- fsub %fr0,src,target %fr0 always holds +0.0 +0.0 - +0.0 = +0.0 which has a different bit pattern than -0.0 which causes the abort. >> The PA1.1 instruction set doesn't allow for any efficient way to do arithmetic which satisfies this aspect of IEEE P754. HP's own compilers do the same thing as the gnu/egcs compilers here. <<PA2.0 machines have a true fneg instruction and using it instead of the hokey fsub instruction causes the test to pass as expected (fneg on PA2.0 machines works by bit twiddling, so it'll always flip the sign bit).>> Evidently, HP got enough criticism about this small discrepancy that they decided to improve their IEEE compliance. But they've been saying for some years now that the hppa architecture will go away when they and Intel get the Merced act going.