This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: FWD: FLOATING-POINT CONSISTENCY, -FFLOAT-STORE, AND X86
- To: tprince at cat dot e-mail dot com, egcs at cygnus dot com
- Subject: Re: FWD: FLOATING-POINT CONSISTENCY, -FFLOAT-STORE, AND X86
- From: Stephen L Moshier <moshier at mediaone dot net>
- Date: Sun, 13 Dec 1998 21:23:35 -0500 (EST)
- Reply-To: moshier at mediaone dot net
The extra-precise registers are supposed to be a feature, not a bug.
Neither the computer language nor the compiler has a way to say
"this is an extra-precise register" so there is some inconvenience
using the feature. It can't be made consistent. The harder you look,
the more contradictions you find.
If you don't believe that, the alternative that makes sense is to
ask for straight IEEE behavior. You can't get IEEE behavior without
setting the coprocessor rounding precision. After you set the
rounding precision, all the other bugs disappear except for a rare
hardware bug or two. The hardware bugs are dealt with by a trap
handler in the operating system, in the time honored fashion
of Intel, Borland, or Microsoft.
So there could be a straightforward plan to make x86 obey IEEE.
It's doubtful there could be a workable plan to fix the extra-precise
registers; anyway, they are a feature, no fix is needed!