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Re: How to clean up i386 machine description?
- To: Joern Rennecke <amylaar at cygnus dot co dot uk>
- Subject: Re: How to clean up i386 machine description?
- From: Jan Hubicka <hubicka at horac dot ta dot jcu dot cz>
- Date: Fri, 13 Nov 1998 22:24:50 +0100
- Cc: rth at cygnus dot com, howell at cs dot stanford dot edu, law at cygnus dot com, pcg at goof dot com, egcs at cygnus dot com
- References: <19981111164314.A11880@dot.cygnus.com> <199811122030.UAA18085@phal.cygnus.co.uk>
>
> special patterns for inc/dec are actually a problem; they should not be
> enabled before reload.
Interesting.. I was asking for this Jeff and he told me that it is not
problem.
Why this happends?
>
> If you need to order instruction alternatives differently for different
> CPUs or use different constraint modifiers so that the alternative
> selection is changed, currently the only way is to have different
> patterns for the different CPUs.
What do you mean by constraint modifier?
> I'm afraid this doesn't sound like much of a cleanup...
:(
I am using constraint for selection in case selection is indepenent on CPU
(like in add case, where add with 8 bit immediate is always better
as well as short opcode for add eax)
>
> The cc0_probably_useless hack is probably useless. It violates the
> assumtions of gcc about targets that use cc0.
> I think you have to re-write the i386 target to explicitly use
> condition code registers (AFAIK there are actually separate integer
> and fp condition code registers?). These should probably be fixed
> registers.
If someone will help me to understand problematic closely, I should try
to do that (it seems to be mostly monotonous work of adding clobbers
and rewirting condition patterns that I should handle (uff))
But I want to be sure that it will work once I will finish it.
Honza
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