Re: How to clean up i386 machine description?

[Colin Douglas Howell <howell at cs dot stanford dot edu>]

Richard Henderson writes:
> 
> On Fri, Nov 06, 1998 at 12:38:04AM -0800, Colin Douglas Howell wrote:
> > Are there any machine descriptions you
> > can point to as sterling examples of The Right Way To Do It?  :-)
> 
> No, cause no other chip has needed to do things this way.
> 
> Well, something like m68k or vax would, were it profitable
> to schedule them, but it isn't so we don't.

I assumed in your original response that you were describing a
solution which was reasonably similar to that used by the more
up-to-date RISC ports.  Apparently I was wrong, and you were
describing a solution unique to the x86.

Why does the x86 require a unique solution to this problem?  Granted,
it's a complex architecture with many different implementations, each
of which has different scheduling properties.  But this isn't
fundamentally different from most RISC architectures out there today;
they too have a great deal of architectural complexity (albeit in
different areas than the x86) and they have a wide variety of
implementations.  The x86 is certainly messier, but this is matter of
degree, not of kind.  I just can't see anything special about the x86
architecture that demands a unique approach.

I would think that we would want to use the same general porting
strategy for each architecture if possible; this would make it easier
to port a new architecture, would allow people to easily move to a
different port without climbing a high learning curve, and would allow
us to easily make fixes or enhancements to all the ports at once.  Am
I mistaken?

-- 
Colin Douglas Howell                    Systems Administrator
e-mail:  howell@cs.stanford.edu         Computer Facilities Group
office:  (650) 723-2491                 Computer Science Department
                                        Stanford University