m68k custom startup - help, I am stuck

["Tomaz Stih" <tomaz dot stih at triglif dot com>]

Last six days I've spend over very trivial matter and I am really
starting to lose my ability to think reasonably. I am writing startup
code for my gcc compiled program for m68000 on custom made
board so that I could compile motorola gdb stub.

I am using leds on my board to debug this (calls xxxOn and xxxOff).
The problem is that whenever my code enters ZeroBss it never returns
(the red led never goes on). I've tried many versions of ZeroBss and
the one in following source code is from RTEMS (at the bottom of this
article). I've also tried this one :

	/*
	 *	ZeroBss
	 *	Zero out entire BSS section as excpected.
	 */
	.globl	ZeroBss
ZeroBss:
	moveal	#_bss, a0
	movel	#_ebss, d0
	subl	a0, d0
LZeroBssLoop:
	cmpl	#0, d0
	beq	LZeroBssReturn
	moveb	#0, a0@+
	subl	#1, d0
	jmp	LZeroBssLoop
LZeroBssReturn:
	rts

and many other and It just doesnt work! Damn! Ive tried importing
_bss and other names from linker script (as you will see in following example) 
using .globl and without .globl, also tried using hardcoding .set bss, value in the 
upper ZeroBss code sample.

Please help.

My Linkcmds and my crt0.s look like this :

Linkcmds:

SECTIONS {

	vectors 0x00000: {
		*(vectors)
	}

	.text : {
		_text = . ;
		*(.text)
		_etext = . ;
	}

	alt_vec 0x20000 : {
		_alt_vec = . ;
		*(alt_vec)
	}
	
	_romdata = _etext ;
	.data 0x20000 + 1524 : AT(_romdata) {
		_data = . ;
		*(.data)
		_edata = . ;
	}

	.bss : {
		_bss = . ;
		 *(.bss) *(COMMON)
		_ebss = . ;
	}

}

crt0.s:

/*
 *	crt0.s
 *
 *	MSV microsystem (EPROM version) startup code. Link this with your
 *	application if it will reside in EPROM. Consult file Linkcmds (linker 
 *	settings) to produce correct binary of your application.
 *
 *	This code is in public domain. Use it as you wish.
 *
 *	crt0.s, v1.0, 1998/aug/14 18:00, Tomaz Stih (tomaz@nameco.com)
 */
	.title	"vEPROM startup"
		
	/* several constants */
	.set 	KILOBYTE, 1024
	.set	SSTACKSIZE, KILOBYTE

	.section vectors
	.long 	vResetSStack + SSTACKSIZE - 4
	.long 	vResetStart
	/* hardwire rest of vectors to alternate vector table */
	.include "vectors.s"

	/* put supervisor stack in BSS section in RAM */
	.bss
	.comm	vResetSStack, SSTACKSIZE

	.text 0
	/*
	 *	This is actual entry point after hardware RESET.
	 */
	.globl vResetStart
vResetStart:		
	oriw	#0x700,sr		/* disable interrupts, super mode */
	jsr	InitLed
	jsr	YellowOn
	jsr	InitAltVectors
	jsr	GreenOn
	jsr	ZeroBss
	jsr	RedOn
	jsr	CopyData
	jsr	GreenOff
	/* if you want "real" main you should push argc and argv to stack before
	   calling it... */ 
	jsr	main
	/* ...and pop after */
	/* wait for reset */
LMainLoop:
	jmp	LMainLoop

	/* 
	 *	__main
	 *	__main is actually required by GNU under certain conditions
	 *	and is here just in case thus there wont be any unresolved 
	 *	externals.
	 */
	.globl 	__main
__main:	rts

	/*
	 *	ZeroBss
	 *	Zero out entire BSS section as excpected.
	 */
	.globl	ZeroBss
#ifdef _EXPLICIT_SYMDECL
	.globl	_bss
	.globl	_ebss
#endif
ZeroBss:
	moveal	#_ebss, a0
	moveal	#_bss, a1
LZeroBssLoop:
	moveb	#0, a1@+
	cmpal	a0, a1
	jlt	LZeroBssLoop
	rts

	/*
	 *	CopyData
	 *	Copy data from data section in ROM to it's relocable RAM
	 *	address.
	 */
	.globl	CopyData
#ifdef _EXPLICIT_SYMDECL
	.globl	_romdata
	.globl	_data
	.globl	_edata
#endif
CopyData:
	moveal	#_romdata, a0
	moveal	#_data, a1
	moveal	#_edata, a2
LCopyDataLoop:
	moveb	a0@+, a1@+
	cmpal	a2, a1
	jlt	LCopyDataLoop
	rts
/* end of crt0.s */

vectors.s :

	/*
	 *	Macro to generate vector table
	 */
	.macro _SETVCT from,to
	.long _alt_vec + \from * 6
	.if \to-\from
	_SETVCT "(\from+1)",\to
	.endif
	.endm
	/*
	 *	This is second part of vector table at 
	 *	address 0x00000008. It contains vectors
	 *	2, 3...253 and is put right after the
	 *	two entries (supervisor stack pointer and
	 *	start address) which form the reset vector.
	 */
	.section vectors, 1
	_SETVCT 0, 100			/* for some strange reason macros */
	_SETVCT 101, 200		/* are allowed max. ~100 nestings */
	_SETVCT 201, 253		/* thus we use three setvct calls */

	/*
	 *	This is single vector table entry that will be
	 *	copied as vector to alternate vector table. It is
	 *	in text section but it is used solely as
	 *	data and never actually executed.
	 */
	.text 2
JsrJmpExcpt:
#ifdef _JSR_VECTOR_TABLE
	jsr	UninitializedExceptionHandler
#else
	jmp	UninitializedExceptionHandler
#endif


	.text 1
	/*
	 *	InitAltVectors
	 *	This subroutine initializes alternate table by
	 *	writing jsr ExceptionHandler to every entry
	 *	in alternate vector table. Should be called
	 *	using jsr InitAltVectors it returns with rts.
	 *	NOTES:	Affects a0, a1 and d0 regs.
	 */
	.text
	.globl	InitAltVectors
InitAltVectors:
	lea	JsrJmpExcpt, a0		/* jsr/jmp entry address */
	lea	_alt_vec, a1		/* alternate vector table */
	movel	#253, d0		/* 255-2(RESET)=253 vectors*/
LInitAltVecLoop:
	movel	(a0), (a1)+		/* move vector (6 bytes) */
	movew	4(a0), (a1)+
	subl	#1, d0			/* next vector */
	bne	LInitAltVecLoop
	rts



	/*
	 *	UninitializedExceptionHandler
	 *	This routine is generic exception handler that
	 *	does nothing but return with rte after poping
	 *	pc (put there by jsr instruction) from stack.
	 */
	.globl	UninitializedExceptionHandler
UninitializedExceptionHandler:
	/*
	 *	Move pc (stored by jsr) to d0. This can be used to
	 *	calculate vector number using formula:
	 *	vector=((d0-_alt_vec)/6)+2
	 */
	
	/* do something */

	rte				/* wonder what happened to flags? */

Could the problem be in vectors.s?

Sincerely,
Tomaz